/*
Title:  Package for CPUStub and BAM
Author: ChinniKrishna Kothapalli
Version: 0.1
Created for: ECE510: System Verilog Final Project
Description: This Package has all the declarations used in CPUStub and BAM
*/
package BamPackage;
	//Global Parameters
	parameter 		High		=1'b1,
				Low		=1'b0,
				ClockCycle 	=1ms,
				ClockWidth 	=ClockCycle/2,
				IdleClocks 	=1;	
	//States of the Bus Activity Monitor
	typedef enum logic[5:0]
	{	
		IdleState	=6'b000001,
		T1State		=6'b000010,
		T2State 	=6'b000100,
		T3State		=6'b001000,
		WaitState	=6'b010000,
		T4State		=6'b100000
	}	MonitorState;
endpackage
